Sigma-Delta Modulator Design and Analysis for Audio Application

  IJETT-book-cover  International Journal of Engineering Trends and Technology (IJETT)          
  
© 2015 by IJETT Journal
Volume-30 Number-5
Year of Publication : 2015
Authors : Jadhav Archana, Sujeet Mishra
DOI :  10.14445/22315381/IJETT-V30P244

Citation 

Jadhav Archana, Sujeet Mishra"Sigma-Delta Modulator Design and Analysis for Audio Application", International Journal of Engineering Trends and Technology (IJETT), V30(5),235-238 December 2015. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group

Abstract
A Sigma-delta modulator is designed in 180nm CMOS process for digital Audio applications. This design is simulated on S-Edit of Tanner EDA tool. In this design continuous time sigma-delta modulator is implemented to reduce the noise problem. This sigma-delta modulator also helps to reduce power consumption of circuit. In these design two stage op-amps is used to implement modulator. Also this design uses second order continuous time modulator for increasing SNR. Circuit design an 11bit low power sigma-delta modulator for digital audio application is given, using a single bit quantizer. The power supply for this circuit is only 1.8v; the modulator achieves 72dB SNR in a 20 KHz BW, while consuming 1mW.

 References

[1] Tong Ziquan, Yang Shaojun “The Design of a Multi-bit Quantization Sigma-delta Modulator” International Journal of Signal Processing, Image Processing and Pattern Recognition Vol.6, No.5 (2013)
[2] K. Chenna Kesava Reddy, “Design of Low Power Sigma Delta ADC ” International Journal of VLSI design & Communication Systems (VLSICS) Vol.3, No.4, August 2012
[3] Soumya Shatakshi Panda “A 15 bit third order Power optimized Continuous time Sigma Delta modulator for audio application” Volume: 03 Special Issue: 15 | Dec-2014 | IWCPS- 2014, Available @ http://www.ijret.org
[4] S. Pavan, N. Krishnapura, R. Pandarinathan, P. Sankar, “A Power Optimized Continuous-Time ?? ADC for Audio Applications”, IEEE Journal of Solid-State Circuits, vol. 43, no. 2, pp. 35–360, 2008.
[5]Keith A.O’Donoghue “A Digitally Corrected 5-mW 2-MS/SC ?? ADC in 0.25?m CMOS With 94dB SFDR”, IEEE Journal of Solid-State Circuits, vol. 46, no. 11, Nov 2011.
[6] Liyuan Lie “ A 1-V 15 bit Audio ?? ADC in 0.18 ?m CMOS ”,IEEE Transaction on circuits andsystems-1:Regular papers,Vol.5 ,no.5 ,May2012
[7] Alireza Nilchi “A Low-Power Delta-Sigma Modulator Using a Charge-Pump Integrator” IEEE Transaction on circuits andsystems-1:Regular papers,Vol.60 ,no.5 ,May2013
[8] Vineeta Upadhyay and Aditi Patwa “Design of First order and Second Order Sigma Delta Analog To Digital Converter” ©IJAET ISSN: 2231-1963, July 2012
[9] Min Gyu Kim “A 0.9 V 92 dB Double-Sampled Switched-RC Delta-Sigma Audio ADC” IEEE Journal of Solid-State Circuits, vol. 43, no. 5, May2008
[10] Kyehyung Lee “An 8.1 mW, 82 dB Delta-Sigma ADC With 1.9 MHz BW and 98 dB THD” IEEE Journal of Solid-State Circuits, vol. 44, no. 8, August2009
[11] Gerry Taylor “A Mostly-Digital Variable-Rate Continuous- Time Delta-Sigma Modulator ADC” IEEE Journal of Solid-State Circuits, vol. 45, no. 12, December 2010
[12] Dragos Ducu “ A 14 bit and 70dB Dynamic range ,continuous time ,sigma delta modulator” ©2013 IEEE
[13] K.lokesh Krishana “Design and implementation of a Low power second order sigma delta ADC” ijcsit ,vol.5(5),2014
[14] Brian P.Brandt “Second order sigma delta modulation for digital audio signal acquisition” IEEE Journal of Solid-State Circuits, vol. 26, no. 4, April1991
[15] Jose M. de la Rosa “Sigma delta modulators: Tutorial overview, design guide, and state of the art survey” IEEE Transaction on circuits and systems-1:Regular papers,Vol.58 ,no.1 ,Jan2011.
[16] Scott D. Kulchycki, “Continuous time sigma delta ADCs” Texas instruments
[17]Ali Tangel “ The cmos inverter” as a comparator in ADC designs
[18] Amana Yadav “Design of two-stage cmos op-amp and analyze the effect of scaling”IJERA ISSN:2248-9622 vol2. Issue 5
[19] Eric Fogleman “An Audio ADC Delta–Sigma Modulator with 100-dB Peak SINAD and 102-dB DR Using a Second-Order Mismatch-Shaping DAC” IEEE Journal of Solid-State Circuits, vol. 36, no. 3, March2001
[20] Matthew R. Miller “A Multibit Sigma–Delta ADC for Multimode Receivers” IEEE Journal of Solid-State Circuits, vol. 38, no. 3, March 2003

Keywords
Analog-to-digital converter (ADC), continuous time, data converter, over sampling, sigma-delta modulation.