High Speed CMOS Comparator Design with 5mV Resolution
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International Journal of Engineering Trends and Technology (IJETT) |  |
| © 2013 by IJETT Journal | ||
| Volume-4 Issue-4 |
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| Year of Publication : 2013 | ||
| Authors : Raghava Garipelly |
Citation
Raghava Garipelly. "High Speed CMOS Comparator Design w ith 5mV Resolution". International Journal of Engineering Trends and Technology (IJETT). V4(4):621-625 Apr 2013. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group
Abstract
A high speed CMOS comparator with low power and high precision is proposed. The topology is very well capable of distinguishing DC volt age difference of around 5 mV, which means a high precision circuit. The propos ed circuit operates at a supply voltage of 2V. The circuit is designed to operate at 600MHz. The circuit can be used in high speed ADC devices
References
[1] Amalan Nag, K. L. Baishnab F. A. Talukdar, Member, IEEE ”Low Power, High Preci sion and Reduced Size CMOS Comparator for High Speed ADC Design” 2010 5th International Conference on Industrial and Information Systems, ICIIS 2010, Jul 29 - Aug 01, 2010, India .
[2] Bang - Sup Song, Seung - Hoon Lee and Michael F. Tempsett ‘‘A 10 - b 15 - MHz CMOS Recycling Two - step A/D Converter’’ IEEE Journal of Solid - State Circuits, vol. 25, no. 6, December 1990.
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[4] Meena Panchore and R. S. Gamad* ‘‘Low Power and High Speed CMOS Comparator Design Using 0.1 8?m Technology’’, International Journal of Electronic Engineering Research, ISSN 0975 - 6450 v ol. 2 n o.1
[5] R. Jacob Baker, Harry W. Li, David E. Boyce, “CMOS - Circuit Design, Layout, And Simulation”, IEEE Press Series on Microelectronic Systems, IEEE P ress, Prentice Hall of India Private Limited, Eastern Economy Edition,2002 , ISBN 0 - 471 — 70055 - x
[6] “Design of Analog CMOS Integrated Circuits”, by Behzad Razavi, Tata McGraw Hill Edition 2002, ISBN – 0 - 07 - 238032 - 2
Keywords
CMOS, resolution, low power, ADC, high speed, level shifting feedback circuit.