Design of RNS Based Addition Subtraction and Multiplication Units

  IJETT-book-cover  International Journal of Engineering Trends and Technology (IJETT)          
  
© 2014 by IJETT Journal
Volume-10 Number-12
Year of Publication : 2014
Authors : N Vivek , K Anusudha
  10.14445/22315381/IJETT-V10P319

Citation 

N Vivek , K Anusudha. "Design of RNS Based Addition Subtraction and Multiplication Units", International Journal of Engineering Trends and Technology (IJETT), V10(12),593-596 April 2014. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group

Abstract

Residue number systems have gained significant importance in the field of high-speed digital signal processing due to their carry-free nature and speed-up provided by parallelism. The cynical aspect in the application of RNS is the selection of the moduli set and the design of the conversion units. In the residue number system, a set of moduli which are independent of each other is given. An integer is represented by the residue of each modulus and the arithmetic operations are based on the residues individually. The arithmetic operations based on residue number system can be performed on various moduli independently to avoid the carry obtained in addition, subtraction and multiplication, which is usually time consuming. Thus, the comparison and division are more complicated and the fraction number computation is immured. In this paper, work is done by the residues of the number and performed Addition, Subtraction and Multiplication are performed which shows more advantages of Carry Free nature. Performance of RNS based Addition, subtraction and Multiplication Units has been implemented for modulo set {2n -1, 2n , 2n+1} for n=2,3 with the targeted device of Spartan 3E using hardware description language called Verilog and synthesized in Xilinx ISE 13.2.

References

[1] Wei Wang, M.N.S. Swamy, M.O. Ahmad and Yuke Wang,“The Applications of The New Chinese Remainder Theorems for Three Moduli Sets”, Proceedings of IEEE Canadian Conference on Electrical and Computer Engineering Shaw Conference Center, Edmonton, Alberta, Canada May 9-12 1999.
[2] Bin Cao, Chip-Hong Chang and Thambipillai Srikanthan, “An Efficient Reverse Converter for the 4-Moduli Set {2n 1, 2n, 2n + 1, 22n + 1} Based on the New Chinese Remainder Theorem”, IEEE Transactions On Circuits And Systems—I: Fundamental Theory And Applications, Vol. 50, No. 10, October 2003.
[3] Salvatore Pontraelli, Gian Carlo Cardarilli, Marco Re, Adelio Salsano, ”Optimized implementation of RNS FIR filters based on FPGAs", Springer Journal of Signal Processing System, Vol.67, issue 3,pp.201-212, June 2012.
[4] A. Omondi and B. Premkumar, “Residue Number System: Theory and implementation”, Imperial College Press, 2007, (ISBN 978-1-86094-866-4).
[5] Jean-Luc Beuchat, “Some Modular Adder and Multipliers for Field Programmable Gate Arrays”, IEEE Proceedings of International Symposium on Parallel and Distributed Processing,v ol.17, pp.8 , April 2010.
[6] Somayeh Timarchi, Keivan Navi, “Improved Modulo 2n +1 Adder Design”, World Academy of Science, Engineering and Technology, 2001
[7] Marco Re , Alberto Nannarelli , Gian Carlo Cardarilli , Roberto Lojacono, “FPGA realization of RNS to Binary signed conversion architecture”, Proceedings of IEEE International Symposium on Circuits and Systems, Sydney, Australia, vol. 4, pp.350-353, May 2001
[8] S.Piestrak, “A high speed realization of a residue to binary number system Converter”, IEEE Transactions on Circuits and systems-II, vol. 42, no. 10, October 1995.
[9] M. R. Schroeder, Number Theory in Science and Communication. Berlin, Germany: Springer-Verlag, 1984.
[10] A. P. Vinod and A. B. Premkumar, “A memoryless reverse converter for the 4-moduli superset {2n-1 , 2n , 2n + 1, 2 n+1-1}” ,J. Circuits, Syst., Comput., vol. 10, no. 1&2, pp. 85–99, 2000.
[11] Somayyeh Jafarali Jassbi, Keivan Navi, and Ahmad khademzadeh, “An Optimum Moduli Set in Residue Number System”, International Journal of Mathematical Forum,vol.5,pp. 2911-2918, March 2010.
[12] P. Samundiswary and S.kalpana, “Design and Analysis of RNS based FIR Filter using Verilog Language”, International Journal of Computational Engineering and Management, vol.16, issue 6, November 2013.
[13] Chip-Hong Chang, Shibu Menon,Bin Cao and Thambipillai Srikanthan, “A Configurable Dual Mouli multi Operand Modular Adder”, IEEE Symposium on Circuits and Systems pp.1168-1171,May 2005.
[14] R. Zimmerman, “Efficient VLSI implementation of modulo (2n±1) addition and multiplication,” in Proc. 14th IEEE Symp. Computer Arithmetic, pp. 158-167, Apr. 1999.

Keywords
Residue Number System (RNS), New Chinese Remainder Theorem (NCRT), Multioperand Modular Adder (MOMA), Mixed Radix Theorem (MRT), Chinese Remainder Theorem(CRT),Carry Save Adder(CSA).