Design and Simulation of Single-Phase Three-Level, Four-Level and Five-Level Inverter Fed Asynchronous Motor Drive with Diode Clamped Topology

  IJETT-book-cover  International Journal of Engineering Trends and Technology (IJETT)          
  
© 2014 by IJETT Journal
Volume-12 Number-1                          
Year of Publication : 2014
Authors : Gerald Diyike , Aniekan 0ffiong , Daniel Nnadi C
  10.14445/22315381/IJETT-V12P207

Citation 

Gerald Diyike , Aniekan 0ffiong , Daniel Nnadi C. "Design and Simulation of Single-Phase Three-Level, Four-Level and Five-Level Inverter Fed Asynchronous Motor Drive with Diode Clamped Topology", International Journal of Engineering Trends and Technology (IJETT), V12(1),27-38 June 2014. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group

Abstract

This paper deals with study of single-phase three-level, four-level and five-level inverter fed asynchronous motor drive. Both three-level, four-level and five-level inverters are realized by diode clamped inverter topology. The poor quality of voltage and current of a convectional inverter fed asynchronous motor is due to presence of harmonic contents and hence there is significant level of energy losses. The multilevel inverter is used to reduce the harmonic contents. The inverter with a large number of steps can generate a high quality voltage waveform. The higher inverter levels can be modulated by comparing a sinusoidal reference signal and multiple triangular carrier signals by the means of pulse width modulation technique. The simulation of single-phase three-level, four-level and five-level inverter fed asynchronous motor model is done using ?MATLAB/SIMULINK?^R (The math Works, Natick, Massachusetts, USA). The Fast Fourier Transform (FFT) spectrums of the outputs are analyzed to study the reduction in the harmonic contents.

References

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Keywords

Asynchronous Motor, Multi-level inverters, pulse width modulation, Total harmonic distortion.