IJBTT

Design of Logic Circuits Using Reversible Gates

	International Journal of Engineering Trends and Technology (IJETT)
	© 2014 by IJETT Journal
	Volume-16 Number-8
	Year of Publication : 2014
	Authors : K.V Manoj , M.Amarnath Reddy
	10.14445/22315381/IJETT-V16P279

Citation 

K.V Manoj , M.Amarnath Reddy. "Design of Logic Circuits Using Reversible Gates", International Journal of Engineering Trends and Technology (IJETT), V16(8),394-396 Oct 2014. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group

Abstract

Reversible logic has become one in all the promising analysis directions in low power dissipating circuit style within the past few years and has found its applications in low power CMOS style, cryptography, digital signal process, optical scientific discipline and engineering. This paper presents a quantum price economical reversible full adder gate and Reversible Decoder in engineering. This gate will work on an individual basis as a reversible full adder & Decoder unit and needs just one clock cycle. The planned gate may be a universal gate within the sense that it may be wont to synthesize any whimsical mathematician functions. To implement reversible logic gates we tend to are planning Full adder and Decoder circuit by mistreatment the T-Spice simulation and calculate the ability consumption with TSMC018 nm Technology.

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