Design of Logic Circuits Using Reversible Gates

  IJETT-book-cover  International Journal of Engineering Trends and Technology (IJETT)
© 2014 by IJETT Journal
Volume-16 Number-8 
Year of Publication : 2014
Authors : K.V Manoj , M.Amarnath Reddy


K.V Manoj , M.Amarnath Reddy. "Design of Logic Circuits Using Reversible Gates", International Journal of Engineering Trends and Technology (IJETT), V16(8),394-396 Oct 2014. ISSN:2231-5381. published by seventh sense research group


Reversible logic has become one in all the promising analysis directions in low power dissipating circuit style within the past few years and has found its applications in low power CMOS style, cryptography, digital signal process, optical scientific discipline and engineering. This paper presents a quantum price economical reversible full adder gate and Reversible Decoder in engineering. This gate will work on an individual basis as a reversible full adder & Decoder unit and needs just one clock cycle. The planned gate may be a universal gate within the sense that it may be wont to synthesize any whimsical mathematician functions. To implement reversible logic gates we tend to are planning Full adder and Decoder circuit by mistreatment the T-Spice simulation and calculate the ability consumption with TSMC018 nm Technology.


[1] Landauer, R., “Irreversibility and warmth generation within the computing process”, IBM J. analysis and Development, 5(3): pp. 183-191, 1961.
[2] aeronaut, C.H., “Logical changeableness of Computation”, IBM J.Research and Development, 17: pp. 525-532, 1973.
[3] Thapliyal H, M. B.Sshrinivas.” a brand new Reversible TSG Gate and Its Application for coming up with economical Adder Circuits”. Centre for VLSI and Embedded System Technologies International Institute of data Technology, Hyderabad, 500019, India
[4] Thapliyal H, M. B.Sshrinivas “Novel Reversible multiplier factor design mistreatment Reversible TSG Gate” pc Systems and Applications, 2006.
[5] L. Jamal, M. Shamsujjoha, and H. M. Hasan Babu, “Design of optimum reversible carry look-ahead adder with optimum garbage and quantum price,” International Journal of Engineering and Technology, vol. 2, pp. 44–50, 2012.
[6] C. H. Bennett, “Logical changeableness of computation,” IBM J. Res. Dev., vol. 17, no. 6, pp. 525–532, Nov. 1973. [Online]. Available:
[7] M. Nielsen and that i. Chuang, Quantum computation and quantum data. New York, NY, USA: university Press, 2000.
[8] M. P. Frank, “The physical limits of computing,” Computing in Science and Engg., vol. 4, no. 3, pp. 16–26, May 2002. [Online]. Available:
[9] A. K. Biswas, M. M. Hasan, A. R. Chowdhury, and H. M. Hasan Babu, “Efficient approaches for coming up with reversible binary coded decimal adders,” Microelectron. J., vol. 39, no. 12, pp. 1693–1703, Dec. 2008. [Online]. Available:
[10] M. Perkowski, “Reversible computation for beginners,” 2000, lecture series, 2000, Portland state university. [Online]. Available: http: //
[11] S. N. Mahammad and K. Veezhinathan, “Constructing on-line testable circuits mistreatment reversible logic,” IEEE Transactions on Instrumentation and mensuration, vol. 59, pp. 101–109, 2010.