Novel 5 Level Cascaded H-Bridge Multilevel Inverter Topology
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International Journal of Engineering Trends and Technology (IJETT) | 
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| © 2015 by IJETT Journal | ||
| Volume-24 Number-5 |
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| Year of Publication : 2015 | ||
| Authors : AbhishekThakur, RejoRoy, T.V.Dixit |
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| DOI : 10.14445/22315381/IJETT-V24P248 |
Citation
AbhishekThakur, RejoRoy, T.V.Dixit"Novel 5 Level Cascaded H-Bridge Multilevel Inverter Topology", International Journal of Engineering Trends and Technology (IJETT), V24(5),272-274 June 2015. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group
Abstract
This paper represents Novel 5 level cascade
H-bridge multilevel inverter using only 6 switches and
two DC power source. The main aim of this paper is to
increase number of levels with Reduced Number of
Switches and Sources at the output without adding any
complication to the power circuit. The main aim of the
novel topology is to decrease the lower whole
harmonic distortion and high output voltage. In this
paper pulse width modulation technique is used to
implement this topology which can minimize the total
harmonic distortion and enhances the output voltages.
The hardware of multilevel Inverter circuits has been
done using Proteus-7.8 software. An AVR
(ATmega16) microcontroller is used to generate pulses
for controlling the multilevel inverter circuit and result
are show in DSO (digital Storage Oscilloscope).
References
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Keywords
Cascaded H- bridge multilevel inverter,
phase pulse width modulation, Proteus7.8/Simulink
software, reduced switches and sources.