Design and Performance Analysis of low Power Reversible Multipliers
Citation
Navsudeep Kaur, Mr. Amandeep Singh"Design and Performance Analysis of low Power Reversible Multipliers", International Journal of Engineering Trends and Technology (IJETT), V38(5),261-267 August 2016. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group
Abstract
Multipliers are one the greatest significant
component of numerous schemes. So we continuously need to
find a superior solution in case of multipliers. Our multipliers
must always consume a smaller amount of power and cover
less power. So over and done with our project and try to
control which of the three algorithms works the best. In this
dissertation obtainable circuit alternatives related with
enterprise of a 4x4 nameless digital multiplier in RL and
delineated the reversible multiplier application of minimal
complexity. Unquestionably, the 4x4 multiplication circuit can
be rummage-sale as a structure block for building RL
multipliers of a superior bit-width. As upcoming research, we
plan learning methods for complexity minimization in RL
array multipliers having great bit-width as well as RL
operations of signed multipliers.
References
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Keywords
As upcoming research, we
plan learning methods for complexity minimization in RL
array multipliers having great bit-width as well as RL
operations of signed multipliers.