Analysis of Read-stability and Write-ability in FinFET SRAM cells

  IJETT-book-cover  International Journal of Engineering Trends and Technology (IJETT)          
  
© 2017 by IJETT Journal
Volume-44 Number-1
Year of Publication : 2017
Authors : Ashish Kumar Sharma, Nikhil Saxena
DOI :  10.14445/22315381/IJETT-V44P210

Citation 

Ashish Kumar Sharma, Nikhil Saxena "Analysis of Read-stability and Write-ability in FinFET SRAM cells", International Journal of Engineering Trends and Technology (IJETT), V44(1),53-56 February 2017. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group

Abstract
SRAM cells are designed exclusively to guarantee that the data of the cell is not altered during read access and the cell can quickly change its state during write operation. These conflicting needs for read and write operations are contented by some specific conditions to provide stable read and write operations, SRAM cell read stability and write ability is most important concerns in nanometer scale technologies, due to the progressive increase in intra die variability and Vdd scaling. In conventional six transistors (6T) SRAM cell, read stability is very low due to the voltage division between the access and driver transistors during read operation. Analysis has been done with the factors responsible to improve the read stability and write ability of 6T SRAM cell structures. SRAM cell stability analysis is typically based on Static Noise Margin (SNM) investigation.

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Keywords
Read stability, write ability, Cell Ratio, Pull up transistor, SRAM cell, Static Noise Margin (SNM)