Reversible Binary and BCD Adder Using DR Gate

  IJETT-book-cover  International Journal of Engineering Trends and Technology (IJETT)          
© 2017 by IJETT Journal
Volume-45 Number-2
Year of Publication : 2017
Authors : Ruchika Likhar, Akanksha Sinha
DOI :  10.14445/22315381/IJETT-V45P211


Ruchika Likhar, Akanksha Sinha " Reversible Binary and BCD Adder Using DR Gate ", International Journal of Engineering Trends and Technology (IJETT), V45(2),47-51 March 2017. ISSN:2231-5381. published by seventh sense research group

Reversible logic is becoming one of the most promising research areas in the past few years and has being found that it is applicable in several technologies; such as low power CMOS, nanotechnology and optical computing. This is relatively new and emerging area in the field of computation which taught for thinking about computation Quantum Computing will be a total change in which computer will operate and function. The reversible arithmetic circuits are efficient regarding number of reversible gates, delay and quantum cost. Optimized design of these adders gives efficient processors. In this work we propose optimized Binary adders and BCD adders with the use of DR gate . The main purposes of designing reversible logic are to decrease quantum cost, gate count and the number of garbage outputs. The main focus is to minimize the actual resources and which provide flexibility. The proposed architecture is implemented in VHDL language using Xilinx ISE 13.2 and then it is going to be implemented in FPGA.


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Reversible logic, DR Gate, Nanotechnology, Optical Computing.