A DSRC Transceiver with Multi Mode Encoder using SOLS Technique
 |
International Journal of Engineering Trends and Technology (IJETT) | 
|
| © 2017 by IJETT Journal | ||
| Volume-47 Number-2 |
||
| Year of Publication : 2017 | ||
| Authors : Vysakh, Rahul M Nair |
||
| DOI : 10.14445/22315381/IJETT-V47P216 |
Citation
Vysakh, Rahul M Nair "A DSRC Transceiver with Multi Mode Encoder using SOLS Technique", International Journal of Engineering Trends and Technology (IJETT), V47(2),98-103 May 2017. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group
Abstract
An intelligent transportation system (ITS)
is a technology, a platform or application that
efficiently improves the quality of vehicle
transportation. To promote the intelligent
transportation system into our daily life, we can
make use of the dedicated short range
Communication (DSRC) technique in to the field of
automobile industries. The FM0 and Manchester
codes are used to reach the dc-balance in dedicated
short range communication systems. The diversity
between the FMO and Manchester codes seriously
limits the area utilization and power consumption. In
proposed system SOLS technique is used to
overcome this limitation. In this Project, an efficient
DSRC encoder and decoder is proposed with ASK
modulator with minimum area utilization with the
help of similarity oriented logic simplification
technique.
References
[1] F. Ahmed-Zaid, F. Bai, S. Bai, C. Basnayake, B. Bellur, S.
Brovold, et al. , ?Vehicle safety communicate ons—Applications
(VSC-A) final report, U.S. Dept. Trans., Nat. Highway Traffic
Safety Admin., Wash- ington, DC, USA, Rep. DOT HS 810 591,
Sep. 2011.
[2] J. B. Kenney, ?Dedicated short-range communications (DSRC)
standards in the United States, Proc. IEEE , vol. 99, no. 7, pp.
1162–1182, Jul. 2011.
[3] J. Daniel, V. Taliwal, A. Meier, W. Holfelder, and R.
Herrtwich, ?Design of 5.9 GHz DSRC-based vehicular safety
communication, IEEE Wireless Commun. Mag. , vol. 13, no. 5,
pp. 36–43, Oct. 2006.
[4] P. Benabes, A. Gauthier, and J. Oksman, ?A Manchester code
generator running at 1 GHz, in Proc. IEEE, Int. Conf. Electron.,
Circuits Syst., vol. 3. Dec. 2003, pp. 1156–1159.
[5] A. Karagounis, A. Polyzos, B. Kotsos, and N. Assimakis, ?A
90nm Manchester code generator with CMOS switches running at
2.4 GHz and 5 GHz, in Proc. 16th Int. Conf. Syst., Signals Image
Process., Jun. 2009, pp. 1–4.
[6] Y.-C. Hung, M.-M. Kuo, C.-K. Tung, and S.-H. Shieh, ?Highspeed
CMOS chip design for Manchester and Miller encoder, in
Proc. Intell. Inf. Hiding Multimedia Signal Process. , Sep. 2009,
pp. 538–541.
[7] M. A. Khan, M. Sharma, and P. R. Brahmanandha, ?FSM
based FM0 and Miller encoder for UHF RFID tag emulator, in
Proc. IEEE Adv. Comput. Conf. , Mar. 2009, pp. 1317–1322.
[8] J.-H. Deng, F.-C. Hsiao, and Y.-H. Lin, ?Top down design of
joint MODEM and CODEC detection schemes for DSRC coded-
FSK systems over high mobility fading channels, in Proc. Adv.
Commun. Technol. Jan. 2013, pp. 98–103.
[9] Yu - H s u a n L e e, Cheng-Wei Pan, ?Fully Reused VLSI
Architecture of FM0/Manchester Encoding Using SOLS
Technique for DSRC Applications, in ieee transactions on very
large scale integration (vlsi) systems. , January 2015.
[10] H. Zhou and A. Aziz, ?Buffer minimization in pass transistor
logic, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. ,
vol. 20, no. 5, pp. 693–697, May 2001.
[11] Yu-Hsuan Lee, and Cheng-Wei Pan, Fully Reused VLSI
Architecture of FM0/Manchester Encoding Using SOLS
Technique for DSRC Applications IEEE transactions on very
large scale integration (VLSI) systems, vol. 23, no. 1, january
2015.
[12] Zakkam Manoj Kartiek, S. Rajendra Kumar, ?VLSI
Modelling of High Speed Area Efficient Encoding Technique in
Dedicated Short Range Communication Application Systems, in
International Journal of Emerging Engineering Research and
Technology Volume 3, Issue 6, June 2015, PP 128-132
[13] M. A. Khan, M. Sharma, and P. R. Brahmanandha, ?FSM
based Manchester encoder for UHF RFID tag emulator, in Proc.
Int. Conf. Comput., Commun. Netw. , Dec. 2008, pp. 1–6.
[14] Brajesh Kumar Gupta, Prof. Rajeshwar Lal Dua , ?30 BIT
Hamming Code for Error Detection and Correction with Even
Parity and Odd Parity Check Method by using VHDL in
International Journal of Computer Applications ,December 2011
Keywords
Dedicated short-range communication
(DSRC), FM0, Manchester, VLSI.