High Speed FIR Filter Based on Truncated Multiplier and Parallel Adder

High Speed FIR Filter Based on Truncated Multiplier and Parallel Adder

  ijett-book-cover  International Journal of Engineering Trends and Technology (IJETT)          
  
© 2013 by IJETT Journal
Volume-5 Number-5                       
Year of Publication : 2013
Authors : Deepshikha Bharti , K. Anusudha

Citation 

Deepshikha Bharti , K. Anusudha. "High Speed FIR Filter Based on Truncated Multiplier and Parallel Adder". International Journal of Engineering Trends and Technology (IJETT). V5(5):243-247 Nov 2013. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group

Abstract

High speed Finite Impulse Response filter (FIR) is designed using the concept of faithfully rounded truncated multiplier and parallel prefix adder. The bit width is also optimized without sacrificing the signal precision. A transposed form of FIR filter is implemented using an improved version of truncated multiplier and parallel prefix adder. Multiplication and addition is frequently required in Digital Signal Processing. Parallel prefix adder provides a high speed addition and the improved version of truncated multiplier also provides successive reduction in delay and the components used

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Keywords
Digital signal processing(DSP), Truncated multiplier, Parallel adder, FIR filter. VLSI design.