Citation :

Remegius Praveen Sahayaraj L, Anitha E, Aswini E, "Machine Learning-Driven Optimization of Cache Memory Prefetching Processes," International Journal of Engineering Trends and Technology (IJETT), vol. 74, no. 7, pp. 372-388, 2026. Crossref, https://doi.org/10.14445/22315381/IJETT-V74I7P123

Abstract

Despite the fact that computer memory has a hierarchical structure that is specifically designed to mitigate the speed disparity between the memory and the processor, it is undeniable that a bottleneck still persists. A prefetcher effectively addresses and alleviates the aforementioned issue by proactively and pre-emptively fetching pertinent memory blocks into the memory levels that are in closest proximity to the processor, even before an explicit request is made by the conventional MMU components. Traditional prefetchers, on the other hand, rely on table-based techniques that are restricted by the proportional increase in memory demands or are incapable of forecasting intricate memory access patterns. The proposed model enhances cache prefetching by implementing an LSTM-based prefetcher that learns from dynamic program traces, thereby eliminating the linear relationship between fetch count and space while enhancing the capability to identify and forecast intricate access patterns.

Keywords

Accuracy of Binary Values, LSTM, Memory, Model Compression, Prefetchers.

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