FPGA Implementation of Various Security Based Tollgate system Using ANPR Technique

  IJETT-book-cover  International Journal of Engineering Trends and Technology (IJETT)          
© 2014 by IJETT Journal
Volume-15 Number-4
Year of Publication : 2014
Authors : Srisailam Shashidhar , S.Vamsee Krishna


Srisailam Shashidhar , S.Vamsee Krishna. "FPGA Implementation of Various Security Based Tollgate system Using ANPR Technique", International Journal of Engineering Trends and Technology (IJETT), V15(4),181-185 Sep 2014. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group


This paper presents the look and development of vehicle plate recognition for automated toll collection. Vehicle plate recognition (LPR) is that the extraction of car plate information from a picture since it`s simpler and faster than the normal token based ticket system, it`s all the potential to interchange the prevailing system. Moreover, it saves users valuable time by reducing the queue length before of the toll counter. It’s accustomed pay the quantity automatically and open & close the toll gate automatically. A vehicle plate is installed on each vehicle. A recognition device at the gate reads this knowledge from the vehicle and compares it with the info within the on-line database and permits the access consequently by gap the gate. This data is employed to print a daily or monthly bill for toll collection from the vehicles. This model has low complexity and takes fewer times in terms of car plate segmentation and character recognition. We aim to scale back the time consumed to pay the toll gate amount and also to assist the RTO, local department to trace the vehicle, just in case} if it absolutely was stolen or used for any illegal activities. Yet as we are reaching to increase the protection features within the toll gate because now a day’s toll gate are the doorway to the most cities. If we increase the protection within the toll gate section automatically the protection within the city are also increased. The proposed open-end credit has been designed using very (high-speed integrated circuit) hardware description language (VHDL) and simulated. Finally, it`s downloaded in a very field programmable gate array (FPGA) chip and tested on some given scenarios. The FPGA implementation is administrated in one among the applying area automatic toll assortment.


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License plate recognition