Dynamic circuits for CMOS and BICMOS low power VLSI Design

  IJETT-book-cover  International Journal of Engineering Trends and Technology (IJETT)          
© 2016 by IJETT Journal
Volume-35 Number-13
Year of Publication : 2016
Authors : Naveen Kumar, Rajesh Mehra
DOI :  10.14445/22315381/IJETT-V35P322


Naveen Kumar, Rajesh Mehra"Dynamic circuits for CMOS and BICMOS low power VLSI Design", International Journal of Engineering Trends and Technology (IJETT), V35(13),605-609 May 2016. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group

Today, in dynamic circuit’s logic gates are used in CMOS and BICMOS technologies by using diodes, resistance and capacitors to decrease the swing in the voltage at output end. This technique improves both power dissipation and delay by using Vdd supply that is 1.8V.Here we discuss new BICMOS proposes and compare it wiith CMOS design. BICMOS logic has advantages such as large load drive capabilities, low static power dissipation, fast switching and high input impedance. In this paper, architecture is designed for CMOS and BICMOS logic using Cad tool and compared the results. BICMOS has better performance in terms of delay and power consumption, in compared to CMOS.


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