Design of PI controller for seven level symmetrical MLI with minimal quantity of switches plus snubber circuit
|International Journal of Engineering Trends and Technology (IJETT)||
|© 2017 by IJETT Journal|
|Year of Publication : 2017|
|Authors : R.Venkateswara rao, K. Ramash Kumar, V S N Narasimha Raju
|DOI : 10.14445/22315381/IJETT-V47P273|
R.Venkateswara rao, K. Ramash Kumar, V S N Narasimha Raju "Design of PI controller for seven level symmetrical MLI with minimal quantity of switches plus snubber circuit", International Journal of Engineering Trends and Technology (IJETT), V47(8),445-452 May 2017. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group
In the current days, multilevel inverters (MLIs) are very popular in industrial applications. The main problems of MLIs are large size (i.e. high cost) and high switching losses (i.e. voltage stress). In this article studies on a design and implementation of classical proportional integral (PI) controller for seven level symmetrical MLI (SLSMLI) with minimum number of switches plus snubber circuit. The classical linear proportional P controller is not able to regulate the output voltage of MLI particularly in larger line and load disturbances. In order to regulate the output voltage, minimize the switching losses, reduce the size and cost of MLI, a PI controller for seven levels symmetrical MLI with reduced quantity of switches plus snubber circuit (SC) is designed. Here, inverted sine carrier variable frequency (ISCVFPWM) technique is used to generate the PWM pulses for designed MLI switches. The performance of designed model is investigated at different working states by making the MATLAB/Simulink model in comparison with P controller. The simulation results of designed MLI have produced minimized total harmonic distortion (THD), excellent output voltage/output current regulations and good power factor.
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Multilevel inverter, Carrier Based PWM, MATALAB/Simulink, Snubber Circuit.