Implementation of Adaptive Viterbi Decoder
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International Journal of Engineering Trends and Technology (IJETT) |  |
| © 2013 by IJETT Journal | ||
| Volume-4 Issue-2 |
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| Year of Publication : 2013 | ||
| Authors : Devendra Made , R.B. Khule , Dipak Iwanate |
Citation
Devendra Made , R.B. Khule , Dipak Iwanate. "Implementation of Adaptive Viterbi Decoder". International Journal of Engineering Trends and Technology (IJETT). V4(2):153-159 Feb 2013. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group
Abstract
Viterbi algorithm is employed in wireless communication to decode the convolutional codes; those codes are used in every robust digital communication systems. Such decoders are complex & dissipiate large amount of power. Thus the paper presents the design of an Adaptive Viterbi Decoder (AVD) that uses survivor path with parameters for wireless communication in an attempt to reduce the power and cost and at the same time increase in speed. Most of the researches work to reduce power consumption, or work with high frequency for using the decoder in the modern applications such as 3 GPP, DVB, and wireless communications. Field Programmable Gate Array technology (FPGA) is considered a highly configurable option for implementing many sophisticated signal Processsing tasks. The proposed decoder design is implemented on Xilinx Spartan 3 , XC3S200 FPGA chip using VHDL code and Xilinx ISE 9.1 used for synthesis.
References
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Keywords
FPGA, VHDL, AVD, AWGN,DoD, VHSIC.