Comparative Analysis of Performance in Domino Logic For Wide Fan-in Gates
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International Journal of Engineering Trends and Technology (IJETT) |  |
| © 2018 by IJETT Journal | ||
| Volume-55 Number-2 |
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| Year of Publication : 2018 | ||
| Authors : Akansha Dawda, Sher Singh |
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| DOI : 10.14445/22315381/IJETT-V55P218 |
Citation
Akansha Dawda , Sher Singh "Comparative Analysis of Performance in Domino Logic For Wide Fan-in Gates", International Journal of Engineering Trends and Technology (IJETT), V55(2),94-98 January 2018. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group
Abstract
As the in semiconductor industries progress by following Moore’s law faithfully from last five decades, and integrating more transistors along with functional circuits on a single chip periodically with every coming process technology. However, this progress help in rapid run towards tiny, circuit design high speed and economical VLSI (Very Large Scale of Integration) circuits has added to excessive power dissipation of numerous circuits used today. Therefore the leakage current and power dissipation becomes increasingly more focused in VLSI circuit design. Carbon Nanotube Field Effect Transistor (CNFETs) is suited best alternatives to the conventional CMOS based devices. During various simulation results, unexpected reduction in process variation, ultra low (nano-scaled) power memory devices and superior improvement of Noise Margin, propagation delay, write-read margin and its stability is found. CNFETs based logic gates are compared with Conventional CMOS and FinFET based logic gates in respect to delay and power consumption..
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Keywords
CNT, CNFET, Power Dissipation, Logic Gates.