Robust Schmitt Trigger-based Performance Booster Technique for Futuristic On-Chip Graphene Interconnects

Robust Schmitt Trigger-based Performance Booster Technique for Futuristic On-Chip Graphene Interconnects

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© 2022 by IJETT Journal
Volume-70 Issue-3
Year of Publication : 2022
Authors : Urmi Shah, Usha Mehta
https://doi.org/10.14445/22315381/IJETT-V70I3P227

How to Cite?

Urmi Shah, Usha Mehta, "Robust Schmitt Trigger-based Performance Booster Technique for Futuristic On-Chip Graphene Interconnects," International Journal of Engineering Trends and Technology, vol. 70, no. 3, pp. 241-248, 2022. Crossref, https://doi.org/10.14445/22315381/IJETT-V70I3P227

Abstract
For compactly high-speed and dense nanoscale integrated circuits (ICs), it is essentially on-chip interconnects rather compared to the devices that govern the performance of the chip. At nanometer-regime, the performance of existing widely used copper on-chip interconnect is adversely affected by varying limiting effects such as sidewall and grain boundaries scatterings. Subsequently, efficient and prospective graphene is investigated as one of the most promising contenders for on-chip interconnect materials. One of the most common strategies for addressing on-chip signal deterioration caused by long interconnects is repeater insertion. CMOS inverter-based buffer has been proposed as a prominent repeater circuit by many researchers. However, these conventional buffers have a high switching time that cumulatively adds up the overall signal delay. To mitigate this issue, a novel CMOS Schmitt trigger-based booster for contemporary futuristic graphene-based nanowires has been proposed in the present paper so as to attain better signal restoration, lesser delay and power reduction. The several analyses performed in this paper show that graphene interconnects with Schmitt trigger gives on average 45% of speed improvement and average power reduction of 40% with respect to conventional CMOS inverter-based buffer design. Also, the efficiency of Schmitt trigger circuits has been verified at varying different technology nodes.

Keywords
Copper interconnects, Graphene interconnects, Repeater Insertion, Schmitt Trigger, VLSI technology.

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