Criticality-cognizant Energy-efficient Task Scheduling on Heterogeneous Multicore Processor

  IJETT-book-cover  International Journal of Engineering Trends and Technology (IJETT)          
  
© 2022 by IJETT Journal
Volume-70 Issue-4
Year of Publication : 2022
Authors : N. Gomathi, K. Nagalakshmi
  10.14445/22315381/IJETT-V70I4P217

MLA 

MLA Style: N. Gomathi, and K. Nagalakshmi. "Criticality-cognizant Energy-efficient Task Scheduling on Heterogeneous Multicore Processor." International Journal of Engineering Trends and Technology, vol. 70, no. 4, Apr. 2022, pp. 203-214. Crossref, https://doi.org/10.14445/22315381/IJETT-V70I4P217

APA Style: N. Gomathi, & K. Nagalakshmi. (2022). Criticality-cognizant Energy-efficient Task Scheduling on Heterogeneous Multicore Processor. International Journal of Engineering Trends and Technology, 70(4), 203-214. https://doi.org/10.14445/22315381/IJETT-V70I4P217

Abstract
Recently, scheduling mixed-criticality tasks on a common computational system has become an imperative study in academia and engineering proposals. Since multicore processors are the main paradigm in mixed-criticality systems (MCS), reliability and energy consumption are vital concerns. In modern MCS, increased peak power dissipation, particularly in critical scenarios, may cause temperature issues, disturbing the system's consistency and timeliness. This work proposes a criticality-cognizant energy-efficient scheduling approach (CESA) that concurrently provides reliability, power management, and failsafe service level in MCS. The proposed approach decreases the system power dissipation as far as achievable at runtime through the dynamic voltage and frequency scaling (DVFS) approach with laxity allocation. CESA simultaneously accepts a number of tasks (i.e., workloads) and creates clusters with one high-criticality workload and a set of low-criticality workloads. It calculates the available laxities effectively and finds the most suitable task cluster to utilize that available laxity by considering its effect on the instantaneous power consumption and thermal issues. At the same time, varying the core speed, assigning an appropriate cluster for remaining laxity, and selecting a suitable core for task migration at runtime are arduous endeavors and lead to deadline defilement which is not acceptable for high-level workloads. Hence, we propose an online scheduling approach with DVFS and task migration during runtime whenever there is laxity. A cost function is defined as finding out the most suitable cluster to allot the laxities to reduce its V/F level or transfer the task to a new processing element. We assess the performance of our approach in an asymmetric multicore platform (i.e., ARM big. LITTLE processor) with several benchmark task sets. Empirical results demonstrate that the proposed algorithm realizes up to a 6.76% drop in maximum power and a 26.17% drop in core temperature related to the state-of-the-art method

Keywords
ARM big.LITTLE, DVFS, Energy efficiency, Task scheduling, Mixed-criticality system, Multicore processors, Laxity utilization.

Reference
[1] K. Nagalakshmi and N. Gomathi, An Irreversible Transition towards Multicore Platform in Safety-Critical Domain for the Aviation Industries, International Journal of Scientific Research in Science Engineering and Technology. 2(5) (2016) 345-359.
[2] K. Nagalakshmi and N. Gomathi, Analysis of Power Management Techniques in Multicore Processors, In proceeding of International Conference on Artificial Intelligence and Evolutionary Computations in Engineering Systems, Advances in Intelligent Systems and Computing, Springer. 517 (2017) 397-418.
[3] Nagalakshmi K, Gomathi, Criticality-Cognizant Clustering-Based Task Scheduling on Multicore Processors in the Avionics Domain, International Journal of Computational Intelligence Systems. 11 (2018) 219–237
[4] ISO 26262, Road Vehicles - Functional Safety. (2011).
[5] RTCA. DO-178C/ED-12C Software Considerations in Airborne Systems and Equipment Certification. (2012).
[6] N. Srivastava, V. Pandey, R. Pathak, Abhishek Pandey, Multicore: Move to the Future, International Journal of Engineering Trends and Technology. 4(2) (2013) 204-206.
[7] A. Kritikakou and S. Skalistis, Progress-aware Dynamic Slack Exploitation in Mixed-critical Systems: Work-in-Progress, 2020 International Conference on Embedded Software (EMSOFT). (2020) 10-12.
[8] J. Simó, P. Balbastre, JF. Blanes, J-L.Poza-Luján and A. Guasque, The Role of Mixed-Criticality Technology in Industry 4.0 Electronics. 10(3) (2021) 226.
[9] M, Ansari, S. Safari, A. Yeganeh-Khaksar, M. Salehi and A. Ejlali, Peak Power Management to Meet Thermal Design Power in Fault-Tolerant Embedded Systems, IEEE Transactions on Parallel and Distributed Systems. 30(1) (2019) 161-173.
[10] S. Hosseinimotlagh, A. Ghahremannezhad, and H. Kim, On Dynamic Thermal Conditions in Mixed-Criticality Systems, 2020 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS). (2020) 336-349.
[11] H. Sobhani, S. Safari, J. Saber-Latibari, and S. Hessabi, REALISM: Reliability-Aware Energy Management in Multi-Level Mixed-Criticality Systems with Service Level Degradation, Journal of Systems Architecture. 117(2) (2021) 102090.
[12] I. Ali, Y-I. Jo, S. Lee, and KH. Kim, Reducing Dynamic Power Consumption in Mixed-Critical Real-Time Systems, Applied Sciences. 10(20) (2020) 7256.
[13] AK. Singh, S. Dey, KR. Basireddy, K. McDonald-Maier, GV. Merrett, and BM. Al-Hashimi, Dynamic Energy and Thermal Management of Multi-Core Mobile Platforms: A Survey, IEEE Design & Test. 10(1) (2020) 335-367.
[14] A. Guasque, P. Balbastre, A. Crespo and S. Peiró, Energy-Efficient Partition Allocation in Mixed-Criticality Systems, PLOS ONE. 14(3) (2019) e0213333.
[15] B. Salami, H. Noori and M. Naghibzadeh, Fairness-Aware Energy Efficient Scheduling on Heterogeneous Multi-Core Processors, in IEEE Transactions on Computers. 70(1) (2021) 72-82.
[16] T. Li, T. Zhang, G. Yu, Y. Zhan and J. Song, Ta-mcf: Thermal Aware Fluid Scheduling for the Mixed-Criticality System, Journal of Circuits, Systems and Computers. 28(2) (2019) 1950029.
[17] S. Moulik, RESET A Real-Time Scheduler for Energy and Temperature Aware Heterogeneous Multi-Core Systems, Integration. 77 (2021) 5969.
[18] M. Bao, A. Andrei, P. Eles, and Z. Peng, On-Line Thermal Aware Dynamic Voltage Scaling for Energy Optimization with Frequency/Temperature Dependency Consideration, In Proc. ACM/IEEE DAC-2009. (2009) 490–495.
[19] V. Kannaian and V. Palanisamy, Energy-Efficient Scheduling for Real-Time Tasks using Dynamic Slack Reclamation, Turkish Journal of Electrical Engineering and Computer Sciences. 27(4) (2019) 2746-2754.
[20] J. Kang and S. Ranka, Dynamic Slack Allocation Algorithms for Energy Minimization on Parallel Machines, Journal of Parallel and Distributed Computing. 70(5) (2010) 417–430.
[21] L. Zhang, K. Li, K. Li, Y. Xu, Joint Optimization of Energy Efficiency and System Reliability for Precedence Constrained Tasks in Heterogeneous Systems, International Journal of Electrical Power & Energy Systems. 78 (2016) 499–512.
[22] D. Zhu, R. Melhem and BR. Childers, Scheduling with Dynamic Voltage/Speed Adjustment using Slack Reclamation in Multiprocessor RealTime Systems, IEEE Transactions on Parallel and Distributed Systems (TPDS). 14(7) (2003) 686–700.
[23] D. Chinnery and K. Keutzer, Overview of the Factors Affecting the Power Consumption, In Proc. TTLPD-2007, Springer. (2007) 11–53.
[24] R. Medina, E. Borde, and L. Pautet, Availability Enhancement, and Analysis for Mixed-Criticality Systems on Multi-Core, In Proc. DATE-2018. (2018) 1271–1276.
[25] MR. Gasthaus, JS. Ringenberg, D. Ernst, TM. Austin, T. Mudge, and RB. Brown, Mibench: A Free, Commercially Representative Embedded Benchmark Suite, In Proc. WWC-4. (2001) 3–14.
[26] S.P Rahul Santosh, K. Somasekhara Rao, Design of Real-Time Interactive Data Acquisition and Control SystemUsing ARM, International Journal of Engineering Trends and Technology (IJETT). 4(10) (2013) 4418- 4421
[27] M. Salehi and A. Ejlali, A Hardware Platform for Evaluating Low-Energy Multiprocessor Embedded Systems Based on Cots Devices, IEEE Transactions on Industrial Electronics. 62(2) (2015) 1262– 1269.