A Novel methodology for Implementation RSA algorithm using FFT in Galois Field

A Novel methodology for Implementation RSA algorithm using FFT in Galois Field

  IJETT-book-cover  International Journal of Engineering Trends and Technology (IJETT)          
  
© 2015 by IJETT Journal
Volume-30 Number-2
Year of Publication : 2015
Authors : S.Syamkumar, Ch.Umasankar

Citation 

S.Syamkumar, Ch.Umasankar"A Novel methodology for Implementation RSA algorithm using FFT in Galois Field", International Journal of Engineering Trends and Technology (IJETT), V30(2),67-74 December 2015. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group

Abstract
In the past decade, one of the most significant advances in cryptography has been the introduction of the first fully homomorphism encryption scheme (FHE). This advance resolved and opened the door to many new applications. Indeed, using a FHE one may perform an arbitrary number of computations directly on the encrypted data without revealing of the secret key. Thus an untrusted party, such as a remotely hosted server, may perform computations on behalf of the owner on the data without compromising privacy. This property of FHE is precisely what makes it invaluable for the cloud computing platforms today. A fully homomorphic encryption (FHE) scheme is envisioned as being a key cryptographic tool in building a secure and reliable cloud computing environment, as it allows arbitrarily evaluation of a cipher text without revealing the plaintext. However, existing FHE implementations remain impractical due to their very high time and resource costs. Of the proposed schemes that can perform FHE to date, a scheme known as FHE over the integers has the advantage of comparatively simpler theory, as well as the employment of a much shorter public key making its implementation somewhat more practical than other competing schemes. This paper presents the first hardware implementations of encryption primitives for FHE over the integers using FPGA technology. First of all, a super-size hardware multiplier architecture utilizing the Integer-FFT multiplication algorithm is proposed, and a super-size hardware Barrett modular reduction module is designed incorporating the proposed multiplier. Next, two encryption primitives that are used in two schemes of FHE over the integers are designed employing the proposed super-size multiplier and modular reduction modules.

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Keywords
Modular multiplication, Rivest–Shamir–Adleman (RSA) cryptosystem, very large scale integration architecture, FHE, GF polynomial.