Code Word Generation for Reconfigurable Crosstalk Elimination
|International Journal of Engineering Trends and Technology (IJETT)||
|© 2015 by IJETT Journal|
|Year of Publication : 2015|
|Authors : K.Manasa Lakshmi, S.Neelima
K.Manasa Lakshmi, S.Neelima"Code Word Generation for Reconfigurable Crosstalk Elimination", International Journal of Engineering Trends and Technology (IJETT), V30(2),55-60 December 2015. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group
One of the greatest challenges in Deep Sub-Micron (DSM) design is inter-wire crosstalk, which becomes significant with shrinking feature sizes of VLSI fabrication processes and greatly limits the speed and increases the power consumption of an IC. This monograph presents approaches to avoid crosstalk in on-chip. The research work presented in the first part of this monograph focuses on crosstalk avoidance with bus encoding, one of the techniques that effectively mitigates the impact of on-chip capacitive crosstalk and improves the speed and power consumption of the bus interconnect . This technique encodes data before transmission over the bus to avoid certain undesirable crosstalk conditions and thereby improves the bus speed and/or energy consumption. We first derive the relationship between the inter-wire capacitive crosstalk and signal speed as well as power, and show the data pattern dependence of crosstalk.
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Cross Talk, Reconfigurable, Code word Generation, Elimination.