A Flexible FPGA communication
|International Journal of Engineering Trends and Technology (IJETT)||
|© 2017 by IJETT Journal|
|Year of Publication : 2017|
|Authors : Shubha Hiremath, Meghana Kulkarni
|DOI : 10.14445/22315381/IJETT-V51P215|
Shubha Hiremath, Meghana Kulkarni "A Flexible FPGA communication", International Journal of Engineering Trends and Technology (IJETT), V51(2),83-87 September 2017. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group
This work is aimed at design and implementation of VGA controller. Video Graphics Interface is widely used as standard display interface. The design consists of top layer module design and the timing function simulation. Hardware architecture is implemented on a NEXYS 3 SPARTAN 6 Field Programmable Gate Array chip, which has gained considerable traction for its application in conjunction with VGA controllers . The focus is on system architecture, hardware design and software programming. This controller is developed using only VERILOG (hardware description language) based on the IEEE standards, to ensure the portability for any manufacturer. The system can display various color strips, Chinese characters, images and even perform certain image processing techniques such as data compression, noise removal etc. The results show that this proposed algorithm gives good performance with optimal time and low resource utilization of up to 54% registers and 31% functional units. Since, the data can be sent directly to monitors, the design speeds up data processing, improve system reliability in real-time and conserve hardware resources.
 FPGA Based Multi Resolution Graphics Controller, Abhijith S, International Journal of Engineering Trends and Technology (IJETT) – Volume 14 Number 6 – Aug 2014.
 http://economictimes.indiatimes.com/topic/CAGR FPGAmarket growth
 Philip H.W. Leong, Dept. of Computer Science and Engineering, Recent Trends in FPGA Architectures and Applications, 4th IEEE International Symposium on Electronic Design, Test & Applications
 Nexys3™Board Reference Manual Revision, (April 3, 2013), www.digilentinc.com
 Spartan-3,Starter Kit Board User Guide, Chapter 5 VGA Port, www.xilinx.com (online)
 Renuka A. Wasu, Vijay R. Wadhankar, Research Scholar, Dept. of ENC, Agnihotri College of Engineering, Nagthana Road, Wardha(M.S), India, H.O.D, Dept. of ENC, Agnihotri College of Engineering, Nagthana Road, Wardha (M.S), India, Design and Implementation of VGA Controller on FPGA, International journal of Innovative research in computer engineering.
 Niveditha Yadav M, Yaseen Basha, Rohith S, Venkateshkumar H, Algorithm to Design VGA controller on FPGA Board
 V. Betz, J. Rose, and A. Marquardt, Eds., Architecture and CAD for Deep-Submicron FPGAs. Kluwer Academic Publishers,1999
 Video Graphics array interfacing through Artix-7 FPGA Mr. Naga V Satyanarayana Murthy, Asst. Professor, department of ECE GNITC, Hyderabad-501506, India
 Image processing using FPGA. By: Sumitha Ajith Saicharan, Bandarupalli and Mahesh Borgaonkar http://web.cecs.pdx.edu/~mperkows/temp/KALMAN/ECE590_ProjectReport.pdf
FPGA, VERILOG, VGA Controller, Nexys 3 Spartan 6.