A Flexible FPGA communication

  IJETT-book-cover  International Journal of Engineering Trends and Technology (IJETT)          
© 2017 by IJETT Journal
Volume-51 Number-2
Year of Publication : 2017
Authors : Shubha Hiremath, Meghana Kulkarni
DOI :  10.14445/22315381/IJETT-V51P215


Shubha Hiremath, Meghana Kulkarni "A Flexible FPGA communication", International Journal of Engineering Trends and Technology (IJETT), V51(2),83-87 September 2017. ISSN:2231-5381. www.ijettjournal.org. published by seventh sense research group

This work is aimed at design and implementation of VGA controller. Video Graphics Interface is widely used as standard display interface. The design consists of top layer module design and the timing function simulation. Hardware architecture is implemented on a NEXYS 3 SPARTAN 6 Field Programmable Gate Array chip, which has gained considerable traction for its application in conjunction with VGA controllers [1]. The focus is on system architecture, hardware design and software programming. This controller is developed using only VERILOG (hardware description language) based on the IEEE standards, to ensure the portability for any manufacturer. The system can display various color strips, Chinese characters, images and even perform certain image processing techniques such as data compression, noise removal etc. The results show that this proposed algorithm gives good performance with optimal time and low resource utilization of up to 54% registers and 31% functional units. Since, the data can be sent directly to monitors, the design speeds up data processing, improve system reliability in real-time and conserve hardware resources.

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FPGA, VERILOG, VGA Controller, Nexys 3 Spartan 6.